PC ISA bus compatible dual serial USART board (8074 based)

After entering the world of the IBM PC by bying an XT clone, I had this idea of using an XT for monitoring data traffic on serial communications links.
My first attempt was to construct a special serial cable which tapped into pins 2 and 3 (TX and RX) of the RS232 signals and connected them to pin3 (RX) on two different standard V.24 serial interfaces. This way, I could "listen" to the data flowing back and forth between the main connectors of that cable. But the speed of both the standard serial card and the 8088 CPU severly limited the possibilities.
And I wanted to monitor more than just async data traffic. These days (1985), HDLC, SDLC were the "new" WAN transmission protocols and "good old" BSC also still heavily in use. Network protocol analyzers were very expensive, and hooking up different machines into a network was a bit of a black art.

So I got me an ISA bus prototyping board, the XT HW reference manual and some chips, I constructed a board based on the INTEL 8047 USART, which was similar to the Z80 SIO, which I had worked with, before.There were copper traces of an address decoding logic and data buffers already on the board. What needed to be added was a programmable clock generator, the 8074 itself and a few MC1488/MC1498 RS232 level shifter. The RX pins of both serial channels of the 8074 were connected to pins 2 and 3 of the external V.24 connector.
The additional signals used wire wrap connections and stayed that way despite all my attempts to produce a silkscreen.

The software was done using 8086 assembly language and also here I felt the need for a high level language. One of the real interesting things I had to cope with was the interrupt handling. There were several interrupt modes on the 8074, and the associated signal lines were connected to the PC-XT's IRQx inputs. That meant taking over interrupt handling without disturbing DOS (2.2) too much. So called TSR (terminate and stay resident) routines provided a way to load object code into DOS-controlled memory and "leave it there" after termination. This project taught me a lot about DOS and the PC hardware architecture.